The conventional compute paradigm is to use a binary alphabet of zeros and ones. With one extra symbol, a ternary alphabet, computers can theoretically be made smaller, more energy efficient, faster and at lower cost.
Since the dawn of digital computing in the 1930's this simple idea of a higher radix is rapidly being adopted in the industry to address the limits of binary.
What is our research focus?
The ternary research group is a small group of researchers with a single mission: to advance the technological readiness level and push ternary and mixed-radix (binary and ternary) computing on the global agenda.
How we conduct our research
Our open source Electronic Design Automation (EDA) tooling, data and roadmap for a ternary technology stack demonstrates that designing balanced ternary logic hardware and software is feasible and has several benefits.
The group was founded in 2019 by Steven Bos and Henning Gundersen at USN. It builds on the ternary research done by Henning at UiO and NTNU since the early 2000's.
We organize weekly progress meetings with our Master and PhD students to discuss the state of the art and beyond.
Our research blog with news and links to our open source software and data repositories can be found at ternaryresearch.com. We are always interested in academic and industrial partners to collaborate and push the ternary agenda further, please reach out for any suggestion!
Current research topics
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EDA tools to design, simulate and verify mixed radix chips (Ternary VLSI)
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Multi-state device technology based on CMOS, memristors and CNTFET
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Multiple Valued Logic (MVL) algorithms including MVL logic synthesis
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Ternary high level synthesis (HLS) and hardware description languages (HDL)
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C to Ternary assembly compilers
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Ternary applications domains: IoT, Embedded AI and Cyber Security
Publications
Selected publications
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Bos, Steven, Risto, Halvor Nybø & Gundersen, Henning (2022). Beyond CMOS: Ternary and mixed radix CNTFET circuit design, simulation and verification. s. 80-85. IEEE International Symposium on Circuits and Systems proceedings.DOI: https://doi.org/10.1109/ISCAS48785.2022.9937259
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Gundersen, Henning & Bos, Steven (2021). Ternary computing; the future of IoT?. s. 43-47. Society for Design and Process Science. Vitenarkiv: https://hdl.handle.net/11250/3068469
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Gundersen, Henning & Berg, Yngvar (2007). Fast Addition using Balanced Ternary Counters Designed with CMOS Semi-Floating Gate Devices. In Steinbach, Bernd (ed.) Proceedings of the 37th International Symposium on Multiple-Valued Logic. DOI: https://doi.org/10.1109/ISMVL.2007.23
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Gundersen, Henning; Jensen, Rene & Berg, Yngvar (2005). A Novel ternary Switching element Using CMOS Recharghe Semi Floating-Gate Devices. In Moraga, Claudio (ed.) The 35th International Symposium on Multiple-Valued Logic ("ISMVL 2005"). DOI: https://doi.org/10.1109/ISMVL.2005.5
PhD theses
MSc alumni
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Ole Christian Moholth on balanced ternary carry-lookahead adders
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Erika Fegri on balanced ternary counters
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Mehtab Singh Virk on voltage/current driven multi-state memristor circuits
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Halvor Nybø Risto on ternary logic synthesis with multi-threshold CNTFETs
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Julian Breivold Nilsen on multi-state memristor circuits and simulation
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Ingvild Engdal on ternary computing assisted secure access control
