PhD Defence: Steven Bos

Steven Bos will defend his PhD degree in Technology. The thesis is about a new type of computer that is not limited to using the binary alphabet with zeros and ones.

08 May

Practical information

  • Date: 8 May 2024
  • Time: 10.15 - 15.30
  • Location: Kongsberg, 2202 Hegstad and Zoom
  • Download calendar file

    •  Follow the PhD Defence on Zoom

    Program 

    10.15. Trial lecture: “Technological yield and power/energy design tradeoffs for cloud versus edge AI" 

    12.15.  PhD Defence: "Towards a new type of computer with 3 instead of 2 stable states".

    Evaluation comittee  

    • First examiner: Professor Valeriu Beiu, Aurel Vlaicu University of Arad, Romania
    • Second examiner: Professor Yngvar Berg, University of Oslo
    • Administrator: Professor Einar Halvorsen,  University of South-Eastern Norway

    Supervisors

    • Principal supervisor: Associate Professor Henning Gundersen, University of South-Eastern Norway
    • Co-supervisor: Professor Nils-Olav Skeie, University of South-Eastern Norway
Any questions?

Steven Bos  is defending his thesis for the degree philosophiae doctor (PhD) at the University of South-Eastern Norway.

The doctoral work has been carried out at the Faculty of Technology, Natural Sciences and Maritime Sciences in the PhD programme in Technology.

Everyone is welcome to follow the trial lecture and the public defence.

Summary

For more than 80 years computers use a binary alphabet of two symbols: 0 and 1. Imagine making English sentences with just two letters! With one extra symbol, a ternary alphabet, modern computers can theoretically become smaller, more energy efficient, faster and at lower cost.
Steven Bos disputerer - portrettbilde
The first part of this doctoral thesis presents a historical analysis why the binary alphabet was chosen and how practical rather than theoretical aspects formed this decision. It is further shown that there is an increasing need to revisit this decision due to fundamental problems.

The second part discusses a long-known alternative, the ternary computer. Benefits of ternary alphabets are presented across seven application domains such as energy consumption, cyber security and design complexity. In addition, some of the critique in literature is shown to be outdated as the industry continuous to adopt ternary and higher radix alphabets as formal standards for storage and communication.

In the last part Electronic Design Automation (EDA) tools and practical building blocks of a ternary computer are proposed. The thesis presents the first browser-based EDA tool to design and verify binary, ternary and hybrid (mixed radix) logic integrated circuits (IC). Several designs made with the tool have been tested using automated workflows on industrial verification tools and successfully taped-out as actual chips. The second tool allows physical experimentation with memristors to test suitability for ternary computers. Memristors are extremely tiny and promising devices to store three or more stable states. Both tools are open sourced and include a permissive license for commercial usage.

The results of this thesis enable an exciting future beyond zeros and ones. The focus on efficiency rather than simplicity and a much lower entry barrier sets the stage for many interesting and fairer computer alphabet comparisons.

The proposed ternary instruction set architecture (ISA) and ternary microprocessor show that complex designs are now in the realm of practical possibilities.